Preparing hardware…
Preparing the processor…
How this instruction works
From the CPU specification. Byte and word arithmetic wraps at its declared width; word(high, low) joins two bytes. Predicted values above come from the emulator.
Previewed memory accesses
Next in memory: . Amber marks the last change.
Latest twelve, newest first. Select an instruction to inspect its captured changes and memory accesses.
No instructions recorded yet.
Preparing RAM…
R: data read · W: bus write · Δ: changed RAM, in any bank. Stops happen after the instruction, even with Live or recording off. Fetches do not trigger R. All toggles off: observe without stopping.
Words are low byte first; their stops cover either byte. Click a word value to browse it as an address. Values follow current mapping; highlights compare displayed samples. Inspectors never read devices.
About this history
Oldest first. Captured only while an address is watched; instruction fetches excluded. Hidden panels, Live off, and paused Changes recording do not stop capture. Resets, restoration, media changes, and register/RAM edits clear history. Links browse current storage.
Innermost call first. Addresses browse Disassembly. Call sites and entries retain their observed mapping; links to a different bank are disabled. Return links show current memory, which the program may change.
No ROM loaded.
ROM file and browser storage
Checking for a remembered ROM…
Choose the verified Apple II Plus ROM. Files stay on your computer. Which file? ↗
Both views remember the same ROM. Use Saved states to keep RAM, programs, devices, and the selected disk across reloads.
ROM reference
Selected ROM entries, workspace names, and hardware addresses. Other software may reuse the workspace.
Pause to save, restore, or compare. Saved states stay in this browser across reloads.
What is saved?
RAM, CPU, devices, disk, and queued keys. Restore replaces the current experiment and leaves it paused. Layout, watches, and breakpoints stay as they are; execution histories are cleared. Load the matching ROM before restoring.
Saved → current
Compare captures net changes, including hidden RAM banks. Values are hex; device fields use their snapshot values.
Before running
What to observe
Selecting a checkpoint changes only the guide. Run stops before its address in ROM, with the usual breakpoints, watchpoints, and instruction limit. Reaching the address does not verify the setup. Step, Pause, and reset remain in Execution.
| ● | PC | Routine | Address | Bytes | Instruction | Operand | ROM comment |
|---|
Breakpoints
Saved in this browser. Run crosses a breakpoint that just stopped execution once, then stops on the next visit. Step executes one instruction.
Recorded changes
Recording · 0 / 500 events retained
CPU address or user action · before → after · newest first
About this log
Values are hex; flags use 0 and 1. Filters only change what is shown. Records every CPU boundary, even with this tab closed. Keeps the latest 500 events. Explicit RAM edits start a new history and are recorded even when instruction recording is off.
Pause recording to keep a capture while the CPU runs. Event numbers leave gaps for unrecorded steps. Clear log restarts numbering.
Memory lists actual RAM changes in write order, including Language Card banks. Unchanged stores, ROM and device writes are omitted. Reset, power-on, state restoration and successful media replacement clear the log.
No events recorded yet.
Memory map
| Address | Reads | Writes |
|---|
Routes from the machine specification; unbound device transfers may be ignored. ROM can supply reads while Language Card RAM receives writes. Unanswered reads supply $00; this model does not simulate the floating bus.
Keyboard
- Key latch
- Strobe
Host delivery sets the strobe. Reading the key preserves it; acknowledgement clears it.
Keyboard description ↗Display switches
- Mode
- Mixed
- Page
- Graphics
The graphics and mixed latches remain stored while Text is selected.
Video description ↗Language Card
- D000 bank
- Read source
- RAM writes
- Prewrite
Prewrite remembers an odd control read. The next odd read can enable writes.
Language Card description ↗Installed hardware
- Motherboard ROM
- Disk II ROM/card
An absent card does not respond to its mapped windows. Drive state is in Disk.
Machine description ↗Amber means changed since the previous displayed sample; hover for the previous value. Inspecting these fields never reads a soft switch.
About device activity
Captured accesses from completed CPU instructions in $C000–CFFF, including slot ROM and unmapped addresses. Newest first; identical consecutive accesses from the same instruction are grouped, retaining their count. Keeps the latest 128 groups, even with Live off or this panel hidden. Clear keeps instruction numbering; reset, fresh power-on, restore, media replacement and register/RAM edits start new history.
Instruction links browse current Disassembly only if the observed mapping is still visible; code bytes may have changed. Address links open Memory, and descriptions link to the specification. Descriptions explain the declared operation; the displayed byte is the actual transferred value. Host keyboard delivery is separate and has no responsible CPU instruction. No device reads are performed by this view.
Drive 1
No disk loaded.
Use the 20 KiB ROM container, then the verified DOS 3.3 System Master. Selecting a disk prepares a fresh, paused machine. Run boots DOS; allow time for Integer BASIC to load.
Disk II controller
No disk controller installed.
This configuration is read-only. Eject preserves RAM; fresh power-on retains the selected disk. No guest reads are used to inspect the controller.